Add omrng(4), a driver for te random number generator found on TI OMAP SoCs.

ok jsg@

sys/arch/armv7/conf/GENERIC

@@ -1,4 +1,4 @@
-#	$OpenBSD: GENERIC,v 1.127 2019/12/17 13:08:55 reyk Exp $
+#	$OpenBSD: GENERIC,v 1.128 2020/04/05 13:11:13 kettenis Exp $
 #
 # For further information on compiling OpenBSD kernels, see the config(8)
 # man page.
@@ -78,6 +78,7 @@ pinctrl*	at fdt?			# pin muxing
 omdog*		at fdt?			# watchdog timer
 omgpio*		at fdt?			# user-visible GPIO pins?
 gpio*		at omgpio?
+omrng*		at fdt?
 tiiic*		at fdt?
 iic*		at tiiic?
 gptimer*	at omap?		# general purpose timers

sys/arch/armv7/conf/RAMDISK

@@ -1,4 +1,4 @@
-#	$OpenBSD: RAMDISK,v 1.113 2020/04/03 23:18:36 jsg Exp $
+#	$OpenBSD: RAMDISK,v 1.114 2020/04/05 13:11:13 kettenis Exp $
 
 machine		armv7 arm
 
@@ -71,6 +71,7 @@ pinctrl*	at fdt?			# pin muxing
 omdog*		at fdt?			# watchdog timer
 omgpio*		at fdt?			# user-visible GPIO pins?
 gpio*		at omgpio?
+omrng*		at fdt?
 tiiic*		at fdt?
 iic*		at tiiic?
 gptimer*	at omap?		# general purpose timers

sys/arch/armv7/omap/am335x_prcmreg.h

@@ -1,4 +1,4 @@
-/* $OpenBSD: am335x_prcmreg.h,v 1.5 2017/08/14 21:46:02 ians Exp $ */
+/* $OpenBSD: am335x_prcmreg.h,v 1.6 2020/04/05 13:11:13 kettenis Exp $ */
 /*
  * Copyright (c) 2013 Raphael Graf <r@undefined.ch>
  *
@@ -28,6 +28,7 @@
 #define PRCM_AM335X_I2C1_CLKCTRL	0x0048
 #define PRCM_AM335X_TIMER2_CLKCTRL	0x0080
 #define PRCM_AM335X_TIMER3_CLKCTRL	0x0084
+#define PRCM_AM335X_RNG_CLKCTRL		0x0090
 #define PRCM_AM335X_GPIO1_CLKCTRL	0x00ac
 #define PRCM_AM335X_GPIO2_CLKCTRL	0x00b0
 #define PRCM_AM335X_GPIO3_CLKCTRL	0x00b4

sys/arch/armv7/omap/files.omap

@@ -1,4 +1,4 @@
-#	$OpenBSD: files.omap,v 1.24 2020/03/31 10:33:10 kettenis Exp $
+#	$OpenBSD: files.omap,v 1.25 2020/04/05 13:11:13 kettenis Exp $
 
 define omap {}
 device omap: omap
@@ -57,6 +57,10 @@ device omdog
 attach omdog at fdt
 file	arch/armv7/omap/omdog.c			omdog
 
+device omrng
+attach omrng at fdt
+file	arch/armv7/omap/omrng.c			omrng
+
 attach ohci at omap with omohci
 file	arch/armv7/omap/omohci.c		omohci
 

sys/arch/armv7/omap/omrng.c

@@ -0,0 +1,158 @@
+/*	$OpenBSD: omrng.c,v 1.1 2020/04/05 13:11:13 kettenis Exp $	*/
+/*
+ * Copyright (c) 2018, 2020 Mark Kettenis <kettenis@openbsd.org>
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/timeout.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+
+#include <dev/rndvar.h>
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/fdt.h>
+
+#include <armv7/omap/prcmvar.h>
+
+/* Registers */
+#define RNG_OUTPUT0		0x0000
+#define RNG_OUTPUT1		0x0004
+#define RNG_STATUS		0x0008
+#define  RNG_STATUS_READY	(1 << 0)
+#define  RNG_STATUS_SHUTDOWN	(1 << 1)
+#define RNG_INTACK		0x0010
+#define  RNG_INTACK_READY	(1 << 0)
+#define  RNG_INTACK_SHUTDOWN	(1 << 1)
+#define RNG_CONTROL		0x0014
+#define  RNG_CONTROL_START_CYCLES_SHIFT	16
+#define  RNG_CONTROL_TRNG_EN	(1 << 10)
+#define RNG_CONFIG		0x0018
+#define  RNG_CONFIG_MIN_CYCLES_SHIFT	0
+#define  RNG_CONFIG_MAX_CYCLES_SHIFT	16
+#define RNG_ALARMCNT		0x001c
+#define  RNG_ALARMCNT_ALARM_TH_SHIFT	0
+#define  RNG_ALARMCNT_SHUTDOWN_TH_SHIFT	16
+#define RNG_FROENABLE		0x0020
+#define  RNG_FROENABLE_MASK	0xffffff
+#define RNG_FRODETUNE		0x0024
+#define RNG_ALARMMASK		0x0028
+#define RNG_ALARMSTOP		0x002c
+
+#define HREAD4(sc, reg)							\
+	(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
+#define HWRITE4(sc, reg, val)						\
+	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
+#define HSET4(sc, reg, bits)						\
+	HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
+#define HCLR4(sc, reg, bits)						\
+	HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
+
+struct omrng_softc {
+	struct device		sc_dev;
+	bus_space_tag_t		sc_iot;
+	bus_space_handle_t	sc_ioh;
+
+	struct timeout		sc_to;
+};
+
+int	omrng_match(struct device *, void *, void *);
+void	omrng_attach(struct device *, struct device *, void *);
+
+struct cfattach	omrng_ca = {
+	sizeof (struct omrng_softc), omrng_match, omrng_attach
+};
+
+struct cfdriver omrng_cd = {
+	NULL, "omrng", DV_DULL
+};
+
+void	omrng_rnd(void *);
+
+int
+omrng_match(struct device *parent, void *match, void *aux)
+{
+	struct fdt_attach_args *faa = aux;
+
+	return OF_is_compatible(faa->fa_node, "ti,omap4-rng");
+}
+
+void
+omrng_attach(struct device *parent, struct device *self, void *aux)
+{
+	struct omrng_softc *sc = (struct omrng_softc *)self;
+	struct fdt_attach_args *faa = aux;
+
+	if (faa->fa_nreg < 1) {
+		printf(": no registers\n");
+		return;
+	}
+
+	sc->sc_iot = faa->fa_iot;
+	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
+	    faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
+		printf(": can't map registers\n");
+		return;
+	}
+
+	printf("\n");
+
+	if (OF_getproplen(faa->fa_node, "ti,hwmods") > 0)
+		prcm_enablemodule(PRCM_RNG);
+
+	/* Configure and enable the RNG. */
+	HWRITE4(sc, RNG_CONFIG, 0x21 << RNG_CONFIG_MIN_CYCLES_SHIFT |
+	    0x22 << RNG_CONFIG_MAX_CYCLES_SHIFT);
+	HWRITE4(sc, RNG_FRODETUNE, 0);
+	HWRITE4(sc, RNG_FROENABLE, RNG_FROENABLE_MASK);
+	HWRITE4(sc, RNG_ALARMCNT, 0xff << RNG_ALARMCNT_ALARM_TH_SHIFT |
+	    0x4 << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT);
+	HWRITE4(sc, RNG_CONTROL, 0xff << RNG_CONTROL_START_CYCLES_SHIFT |
+	    RNG_CONTROL_TRNG_EN);
+
+	timeout_set(&sc->sc_to, omrng_rnd, sc);
+	omrng_rnd(sc);
+}
+
+void
+omrng_rnd(void *arg)
+{
+	struct omrng_softc *sc = arg;
+	uint32_t status, detune;
+
+	status = HREAD4(sc, RNG_STATUS);
+	if (status & RNG_STATUS_SHUTDOWN) {
+		/* Clear alarms. */
+		HWRITE4(sc, RNG_ALARMMASK, 0);
+		HWRITE4(sc, RNG_ALARMSTOP, 0);
+
+		/* Detune FROs that are shutdown. */
+		detune = ~HREAD4(sc, RNG_FROENABLE) & RNG_FROENABLE_MASK;
+		HSET4(sc, RNG_FRODETUNE, detune);
+
+		/* Re-enable them. */
+		HWRITE4(sc, RNG_FROENABLE, RNG_FROENABLE_MASK);
+		HWRITE4(sc, RNG_INTACK, RNG_INTACK_SHUTDOWN);
+	}
+	if (status & RNG_STATUS_READY) {
+		enqueue_randomness(HREAD4(sc, RNG_OUTPUT0));
+		enqueue_randomness(HREAD4(sc, RNG_OUTPUT1));
+		HWRITE4(sc, RNG_INTACK, RNG_INTACK_READY);
+	}
+
+	timeout_add_sec(&sc->sc_to, 1);
+}

sys/arch/armv7/omap/prcm.c

@@ -1,4 +1,4 @@
-/* $OpenBSD: prcm.c,v 1.13 2017/09/08 05:36:51 deraadt Exp $ */
+/* $OpenBSD: prcm.c,v 1.14 2020/04/05 13:11:13 kettenis Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  *
@@ -380,6 +380,8 @@ prcm_am335x_clkctrl(int mod)
 		return PRCM_AM335X_I2C2_CLKCTRL;
 	case PRCM_LCDC:
 		return PRCM_AM335X_LCDC_CLKCTRL;
+	case PRCM_RNG:
+		return PRCM_AM335X_RNG_CLKCTRL;
 	default:
 		panic("%s: module not found\n", __func__);
 	}

sys/arch/armv7/omap/prcmvar.h

@@ -1,4 +1,4 @@
-/* $OpenBSD: prcmvar.h,v 1.7 2017/08/14 21:46:02 ians Exp $ */
+/* $OpenBSD: prcmvar.h,v 1.8 2020/04/05 13:11:13 kettenis Exp $ */
 /*
  * Copyright (c) 2007,2009 Dale Rahn <drahn@openbsd.org>
  *
@@ -55,6 +55,7 @@ enum PRCM_MODULES {
 	PRCM_I2C2,
 	PRCM_I2C3,
 	PRCM_LCDC,
+	PRCM_RNG,
 };
 
 #define PRCM_REG_MAX	6