unbreak build with llvm-19+ by pulling the following upstream commits

5a9c052ba78e5d1b0020b8f8320d211d2205a958 amd: Include missing llvm IR header Module.h
fa9cd89a85b904615ebc11da609445b5b751e68d Update lp_bld_misc.cpp to support llvm-19+.
a8eed9cca26b1c4b6526be7d042adec6703a30ae gallium: Don't pass avx512er and avx512pf features on LLVM 19

ok jsg@
This commit is contained in:
robert
2025-01-16 15:27:05 +00:00
parent c847d1208d
commit ac809dfdca
2 changed files with 11 additions and 2 deletions

View File

@@ -8,6 +8,7 @@
#include <llvm/Analysis/TargetLibraryInfo.h>
#include <llvm/IR/IRBuilder.h>
#include <llvm/IR/LegacyPassManager.h>
#include <llvm/IR/Module.h>
#include <llvm/IR/Verifier.h>
#include <llvm/Target/TargetMachine.h>
#include <llvm/MC/MCSubtargetInfo.h>

View File

@@ -402,8 +402,14 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
* which allows us to enable/disable code generation based
* on the results of cpuid on these architectures.
*/
#if LLVM_VERSION_MAJOR >= 19
/* llvm-19+ returns StringMap from getHostCPUFeatures.
*/
auto features = llvm::sys::getHostCPUFeatures();
#else
llvm::StringMap<bool> features;
llvm::sys::getHostCPUFeatures(features);
#endif
for (StringMapIterator<bool> f = features.begin();
f != features.end();
@@ -443,8 +449,10 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
/* All avx512 have avx512f */
MAttrs.push_back(util_get_cpu_caps()->has_avx512f ? "+avx512f" : "-avx512f");
MAttrs.push_back(util_get_cpu_caps()->has_avx512cd ? "+avx512cd" : "-avx512cd");
#if LLVM_VERSION_MAJOR < 19
MAttrs.push_back(util_get_cpu_caps()->has_avx512er ? "+avx512er" : "-avx512er");
MAttrs.push_back(util_get_cpu_caps()->has_avx512pf ? "+avx512pf" : "-avx512pf");
#endif
MAttrs.push_back(util_get_cpu_caps()->has_avx512bw ? "+avx512bw" : "-avx512bw");
MAttrs.push_back(util_get_cpu_caps()->has_avx512dq ? "+avx512dq" : "-avx512dq");
MAttrs.push_back(util_get_cpu_caps()->has_avx512vl ? "+avx512vl" : "-avx512vl");