From 8a4a3a78bbe7966d90835ebf6a898524c33c456c Mon Sep 17 00:00:00 2001 From: kettenis Date: Sun, 5 Apr 2026 22:13:21 +0000 Subject: [PATCH] Treat "Instruction access fault" (EXCP_FAULT_FETCH) traps as PROT_EXEC. Fixes random SIGSEGV on the SpecemiT X60 cores. ok mlarkin@, deraadt@ --- sys/arch/riscv64/riscv64/trap.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/sys/arch/riscv64/riscv64/trap.c b/sys/arch/riscv64/riscv64/trap.c index 37f32a5e3da..f34aaecf49d 100644 --- a/sys/arch/riscv64/riscv64/trap.c +++ b/sys/arch/riscv64/riscv64/trap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: trap.c,v 1.21 2026/03/08 17:07:31 deraadt Exp $ */ +/* $OpenBSD: trap.c,v 1.22 2026/04/05 22:13:21 kettenis Exp $ */ /* * Copyright (c) 2020 Shivam Waghela @@ -176,10 +176,11 @@ accesstype(struct trapframe *frame) { vm_prot_t access_type; - if ((frame->tf_scause == EXCP_FAULT_STORE) || - (frame->tf_scause == EXCP_STORE_PAGE_FAULT)) { + if (frame->tf_scause == EXCP_FAULT_STORE || + frame->tf_scause == EXCP_STORE_PAGE_FAULT) { access_type = PROT_WRITE; - } else if (frame->tf_scause == EXCP_INST_PAGE_FAULT) { + } else if (frame->tf_scause == EXCP_FAULT_FETCH || + frame->tf_scause == EXCP_INST_PAGE_FAULT) { access_type = PROT_EXEC; } else { access_type = PROT_READ;